www.siliconstandard.com 1 of 8 SS7529 re v . 1 . 01 4 /26 /2004 synchronous buck pwm and linear power controller general description the SS7529 consists of a dual-output power controller and the protection circuits in a single so-14 package for graphic cards and other applications. the dual-output power controller provides regulation by driving two n-mosfets in a synchronous rectified buck converter, and one n-mosfet in a linear configuration. the synchronous rectified buck converter provides simple, single feedback loop, voltage mode control with fast transient response, from an internal 0.8v temperature- compensated reference voltage. a fixed 600khz frequency oscillator reduces design complexity, while balancing typical application cost and efficiency. the internal soft-start function and the 12v direct drive on the switching output help to save the bootstrap circuit. furthermore, the internal por (power on reset) helps to prevent the system from sequencing issues during the startup and turn-off. reacting to fault conditions, the SS7529 will shutdown both outputs when the voltage on either fb or fb2 pins drops below 51% of their nominal value. typical applications feature controller operates from 5v and 12v drives two n-channel mosfets for switching buck converter drives an n-channel mosfet on the linear output fixed 600khz constant switching frequency full range 0~100% duty cycle internal soft start fast transient response uvp monitoring on both outputs internal 0.8v reference voltage. applications graphics-gpu and memory supplies asic power supplies embedded processor and i/o supplies cable modem, set top box, and dsl modems dsp and core communications processor supplies osc fb c omp l gate ug ate 5vcc contr ol log ic gnd shu tdo wn err or amp vin (3 .3v or 5v) vout vout 12vcc pg nd vref linear c ontr ol ler 5v 1 2v fb2 d rive2 q1 q2 q3
www.siliconstandard.com 2 of 8 SS7529 re v . 1 . 01 4 /26 /2004 ordering information pinout information 1 2 3 4 5 6 7 8 13 driver2 nc fb2 pgnd comp fb lgate nc 9 5vcc 12 10 11 ugate nc 12vcc gnd 14 nc SS7529 packing: SS7529csxx block diagram dead t ime contr ol oscillator vref fb comp pgnd lgate ugate uvlo/p or 5vcc contr ol logic gnd inh ibit/soft start fb2 error amp pwm compa rator 12vcc 5v fb2 drive2 uv detection re- start fb fb2 51% vref shutdown 161% vref package type: tb: tubes tr: tape and reel s: small outline so-14 for example: SS7529cstr SS7529 in so-14 shipped in tape and reel
www.siliconstandard.com 3 of 8 SS7529 re v . 1 . 01 4 /26 /2004 pin descriptions pin n ame func ti on 1 lgate connect lgate pin to the pwm converter?s lower mosfet gate. this pin provides the gate drive for the lower mosfet. 2 pgnd po wer ground ret urn 3 gnd signal and power ground for the ic. all voltage levels are measured with respect to this pin. 4 5vcc connect this pin to 5v supply voltage. this pin provides the bias for the control circuitry. the voltage at this pin is monitored for power-on reset (por) purposes. 5 drive2 this pin is the output of the linear controller. connect this pin to the gate of an external n-mosfet to provide output power. 6 fb2 this pin is the inverting input of the internal error amplifier for the linear regulator output. connect this pin to the output of the converter via an external resistor divider. 7 nc not connected 8 nc not connected 9 fb this pin is the inverting input of the internal error amplifier for the switching buck converter. connect this pin to the output of the converter via an external resistor divider. 10 comp error amplifier output 11 nc not connected 12 nc not connected 13 12vcc connect this pin to the 12v supply voltage. this pin provides the bias for the driver circuitry. the voltage at this pin is monitored for power-on reset (por) purposes. 14 ugate connect the ugate pin to the pwm converter?s upper mosfet gate. this pin provides the gate drive for the upper mosfet. absolute maximum ratings supply vol tage 5vc c. ??????????????? ???????? ?..?. - 0.3 ~ 7v supply vol tage 12v cc ?????????? ???????? ??????? - 0.3 ~ 14v ug a te, lga te, drive2 ??? ???????? ???????? ?????? - 0.3 ~12vcc fb, fb2, comp ?????? ???????? ???????? ??????? - 0.3 ~ 5vcc+0.3 operati ng tem perature ran ge?????? ???????? ????..?? ?? 0 o c t o 7 0 o c sto rage tem peratu re range??????? ???????? ??????.. ?? ? 65 o c to 150 o c junction t emperatu re??????? ???????? ???????.???? 0 o c t o 1 25 o c pa ckage thermal resi stance so-14.???????????????????? 68 o c/w lead t em perature (sol derin g, 10 sec)??????? ???????? ????.. 3 00 o c caut ion: stresses beyond the ratings specified in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress-only rating and the device should not be operated at these, or any other conditions above those indicated in the operational sections of this specification. electrical characteristics (t a = +25 o c unless o therwi se s tate d, vcc=5.0 v) para meter condi ti ons min typ max units vcc sup ply vol ta ge 12vcc 10.8 12 13.2 v 5vcc 4.5 5. 0 5.5 v vcc supply cu r rent nominal supply current 12vcc ugate and lgate open 1.3 ma nominal supply current 5vcc ugate and lgate open 1.0 ma
www.siliconstandard.com 4 of 8 SS7529 re v . 1 . 01 4 /26 /2004 5vcc falling threshold 3.7 3.9 4.1 v 12vcc rising threshold 9.6 10.3 10.8 v 12vcc falling threshold 9.2 9.6 10.2 v oscilla t or frequency 550 600 650 khz ramp amplitude 1.5 vp-p soft-st art soft-start interval 3.4 ms reference reference voltage tolerance -2 +2 % nominal reference voltage 0.8 v pwm error a mplifier dc gain 70 db gain bandwidth product 10 mhz slew rate 6 v/us fb input bias current 20 150 na comp high output voltage 5 v comp high output current (source) -7.3 ma comp low output voltage 0.5 1 v comp low output current (sink) 5.6 ma pwm gate drivers ugate & lgate source current -1 a ugate & lgate sink current 1 a ugate maximum voltage 11 12 v lgate maximum voltage 4 5 v ugate & lgate output impedance 3.1 4.3 w pwm protection under-voltage level (vfb/vref) 51 % linear regulator error amplifier dc gain 70 db gain bandwidth product 10 mhz slew rate 6 v/us fb2 input bias current 20 150 na drive2 high output voltage 12 v drive2 high output current -14 ma drive2 low output voltage 0 0.5 v drive2 low output current 14 ma linear regulator protection under-voltage level (vfb2/vref) 51 % over-voltage level (vfb2/vref) 161 % electrical characteristics (cont.) 5vcc rising threshold 4.15 4.35 4.55 v power on reset 5vcc rising threshold 4.15 4.35 4.55 v
www.siliconstandard.com 5 of 8 SS7529 re v . 1 . 01 4 /26/2004 typical performance characteristics figure 1. power on figure 2. power off figure 3. dead time figure 4. dead time figure 5. load off transient response figure 6. load on transient response vin vout2 vout1 u g ate l g ate u g ate l g ate vin vout2 vout1 vout1 iout1 vout1 iout1 vout2 vout2
www.siliconstandard.com 6 of 8 SS7529 re v . 1 . 01 4 /26 /2004 functional description operation over view as graphic-card power design is getting more and more complicated, engineers need a smart solution to reduce not only the design effort, but to further reduce the development time. the SS7529 is targeted at providing application to provide an easy and cost effective solution. the SS7529 control circuit is supplied by 5v and the high- side mosfet driver is supplied by 12v to eliminate the bootstrap circuit. the SS7529 integrates a synchronous-rectified buck controller and a linear power controller to control the supply of both the high-current requirement of the gpu and the low current requirement of memory. to address fault conditions, uvp (under-voltage protection) is implemented on both outputs and ovp (over-voltage protection) on the linear controller. the high switching frequency (600khz) helps to reduce component sizes and the output ripple. ini ti alizati on there is a smart power-on-reset (por) circuit to monitor both 5vcc and 12vcc to identify if controller has started operation or not. this is to prevent fault conditions from undesirable power sequencing. with this, users can easily implement circuits without worrying about the power sequencing. soft-start the por function initiates the soft-start function after the 5vcc and 12vcc reach their threshold voltage. the built-in soft-start function is to prevent inrush current and output voltage overshoot during power on. an internal digital counter controls the soft-start voltage. it clamps the ramping of reference voltage at the input of the error amplifier and increases the pulse width of the output driver slowly. the typical soft-start duration is 3.4ms. under-voltage protect ion the under-voltage protection (uvp) of the SS7529 is implemented by monitoring the feedback signal at fb and fb2 pins. whenever one of these two signals drops below 51% of the internal reference, the uvp will be triggered and then both outputs will be quickly shut down. unless the fault condition is removed, both outputs will keep in hiccup mode operation. output voltage s etting both SS7529 outputs achieve regulation by feedback from the voltage dividers. therefore, the output voltage can be easily programmed by the resistor values in the following equation. for switching output (figure 7), = 0.8 vv rr r v out ref 41 4 1 = + SS7529 12vcc 5vcc +5v +12v +3.3v vout1 ugate lgate fb comp r4 r2 c1 c2 r1 c3 r3 figure 7. output voltage selection of the pwm output for linear output (figure 8), rr r v out 65 6 2 + = 0.8v vout2 +3.3vin SS7529 r5 r6 driver2 fb2 cout2 figure 8. output voltage selection of the linear output converter shutdown forcing the fb2 pin to be higher than a threshold of 1.28v will shutdown both regulators. when the applied voltage is removed, the regulators will return to the re-start cycle and begin the soft-start process.
www.siliconstandard.com 7 of 8 SS7529 re v . 1 . 01 4 /26 /2004 layout hints there are some principles which should be followed when designing with the SS7529: 1. keep the bypass capacitors of 5vcc and 12vcc very close to ic. 2. keep output voltage feed back network, fb pin and fb2 pin related components (small signal components) very close to ic. 3. signal ground plane of fb and fb2 pin (small signal components) should be connected to the power ground plane with a via or only one point to minimizes the effect of power ground currents. 4. switching node such as ugate and lgate should be kept as small as possible and routed away from fb, fb2, and other linear circuit. 5. the pcb traces carrying discontinuous currents and any high current path should be made as short and wide as possible. 6. if possible, a multi-layer pcb is recommended. please refer to the ev kit of SS7529 for a pcb layout example. typical application circuit nc 11 fb2 6 drives2 5 5vcc 4 12vcc 13 gnd 3 pgnd 2 comp 10 fb 9 lgat 1 ugat 14 nc 7 nc 8 nc 12 ss7 5 29 1 j1 12v 1 j2 5v 1 j3 2.5vo ut 1 j4 1.6vo ut 1 j5 +3.3vin c1 1u c2 1u 12v 5v q1 3055 r1 1k r4 4.64k r5 2.15k r6 6.8k r2 1k r7 10.7k r3 1k r8 0 o hm c4 470p c5 2.2n c6 47n l1 1u l2 2uh c7 1.2n c8 470uf c9 470uf c10 330uf c15 1u c11 330uf c12 330uf c13 470uf c16 1uf c3 1uf +3.3v 1 j6 gnd sw1 sw dpst 1 j7 gnd c14 470uf 1 j8 con1 q2 q3
in formation furnished by silicon standard corporation is believed to be accurate and reliable. however, silicon standard corporation makes no guarantee or warranty, expre ss or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. silicon standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. no license is granted, whether expressly or by im plication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of silicon standard corporation or any third parties. www.siliconstandard.com 8 of 8 SS7529 re v . 1 . 01 4 /26 /2004 packaging information package: sop-14
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